Ports

Words for I/O ports, the CPU and the PCI bus. They run in ring 0, check nothing and can't be undone. in and out accept any port, including those that reset the machine.

I/O ports

Word	Effect
`in`	`port -- n`	read a byte
`out`	`n port --`	write a byte
`ind`	`port -- n`	read 4 bytes
`outd`	`n port --`	write 4 bytes

These map directly to the in and out instructions. There are no 2-byte variants.

Notable ports:

Port	What's there
`0x20`, `0xA0`	the two interrupt controllers
`0x40` to `0x43`	the PIT, which drives the 100 Hz timer and therefore the scheduler
`0x60`, `0x64`	the PS/2 keyboard controller, which `reboot` also uses
`0x80`	the POST port, harmless to write, which is why the examples use it
`0x1F0` to `0x1F7`, `0x3F6`	the primary IDE controller, where installed disks live
`0x170` to `0x177`, `0x376`	the secondary IDE controller
`0x3C0` to `0x3DF`	VGA, including the palette and the font
`0x92`	fast A20, which the bootloader turns on
`0xCF8`, `0xCFC`	PCI configuration space

Reprogramming the PIT changes the scheduling rate and the length of sleep. Masking interrupts at the PIC stops the timer or the keyboard. Writing to the IDE ports during a save can corrupt a slot.

The CPU

0 cpuid             leaves eax ebx ecx edx for leaf 0
cpu say             the CPU's brand string
0 cr                control register 0
rdtsc               the time stamp counter

cpuid takes a leaf and runs the instruction with it in eax. cr reads cr0, cr2, cr3 or cr4, and anything else fails with cr only takes 0, 2, 3 or 4. No word writes a control register. cr3 is the address of the page table root, and with peekq you can walk it.

cpuinfo on the tools page is built on cpuid, and decodes the feature flags with edx-flags, ecx-flags and show-flags.

Interrupts

1 irq               how many times IRQ 1 has fired

The interrupt controllers are remapped to vectors 0x20 and up, and only IRQ 0, the timer, and IRQ 1, the keyboard, are unmasked. All other lines are masked, so their counts stay at 0. The disks are driven by polling, not interrupts. irqmon shows the counts live, and top shows the rates.

Vector 48 is the software interrupt a tab uses to give up the CPU early. See the scheduler.

PCI

pci                 every PCI function as [ bus dev fn vendor device class subclass ]
0 0 0 0 pci@        a dword from a function's configuration space

pci@ takes the bus, device, function and offset, and reads through 0xCF8 and 0xCFC. There is no pci!, but a write is just outd to 0xCF8 followed by outd to 0xCFC.

pcils prints the list with vendor and class names from vendor and class-name, which only know the vendors QEMU presents.

pcils

And then

See memory for the other half of talking to hardware, and machine for the words that act on the whole machine.